The RHINO (Reconfigurable Hardware Interface for computatioN and radiO) project is an Open Source effort at the University of Cape Town in South Africa to provide a hardware platform and software toolchain for SDR which is both easy to use, easy to learn and affordable to a broad audience. It is hoped that this effort will consolidate and enhance the teaching and research resources available for SDR.

Rhino follows the same fundamental computer architecture as the current ROACH based CASPER hardware; namely a single FPGA element with memory, high speed communication, and IO expansion slots, all controlled via a processor running the BORPH operating system. Below is an overview of the rhino architecture


The NetFPGA is a line-rate, flexible, and open platform for research, and classroom experimentation. More than 1,000 NetFPGA systems have been deployed at over 150 institutions in over 15 countries around the world.

The NetFPGA is a PCI card that contains a large Xilinx FPGA, 4 Gigabit Ethernet ports, Static RAM (SRAM), Double-Date Rate (DDR2) Dynamic RAM (DRAM). The card design is open-source and the hardware is made available at very low cost through donations of gifts and Silicon chips by sponsors of the NetFPGA project. The NetFPGA enables researchers and students to build working prototypes of high-speed, hardware-accelerated networking systems. The NetFPGA has been used in the teachers in the classroom to help students learn how to build Gigabit Ethernet (GigE) switches and Internet Protocol (IP) routers. It has also been used by researchers to prototype new modules that use hardware rather than software to forward packets.


ROACH is a Virtex5-based upgrade to current CASPER hardware. It merges aspects from the IBOB and BEE2 platforms into a single board. The CX4/XAUI/10GbE interfaces of both are kept, while combining the Z-DOK daughter board interface of the IBOB with the high bandwidth/capacity DRAM memory and standalone usage model of the BEE2. ROACH is a single-FPGA board, dispensing with the on-board inter-FPGA links in favor of 10GbE interfaces for all cross-FPGA communications.

ROACH-2 was designed as the sequel to ROACH 1 using the new Xilinx Virtex-6 series of FPGAs. It maintains all the aspects that made ROACH 1 a success, but increase the overall performance in terms of processing power, IO throughput and memory bandwidth. It uses the same PowerPC 440EPx present on the ROACH 1 but adds a unified JTAG interface provided through an FTDI FT4232H IC.

Last Updated: 31 July 2011